cystech electronics corp. spec. no. : c 151 e3 issued date : 20 1 8 . 0 7 . 05 revised date : page no. : 1 / 8 mte1 d 3n0 4 b e3 cyste k product specification n - channel enhancement mode power mosfet mte 1d 3n 0 4 b e3 features ? low on resistance ? simple drive requirement ? low gate charge ? fast switching characteristic ? rohs compliant package symbol outline o rdering inf ormation device package shipping mte1 d 3n0 4 b e 3 - 0 - ub - x t o - 220 (pb - free lead plating package) 50 pcs/tube, 20 tubes/box, 4 boxes / carton to - 220 mte 1d 3n 0 4 b e3 g gate d drain s source bv dss 4 0v i d @v gs =10v, t c =25 c 195 a i dsm @v gs =10v, t a =25 c 2 5 a r ds(on) @v gs =10v, i d = 5 0a 1 . 4 m (typ) g d s environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, ub : 50 pcs / tube, 20 tubes/box product rank, zero for no rank products pr oduct name
cystech electronics corp. spec. no. : c 151 e3 issued date : 20 1 8 . 0 7 . 05 revised date : page no. : 2 / 8 mte1 d 3n0 4 b e3 cyste k product specification absolute maximum ratings (t c =25 ? c) parameter symbol limits unit drain - sour c e voltage (note 1) v ds 4 0 v gate - source voltage v gs 20 continuous drain current @t c =25 ? c , v gs =10v (silicon limit) (note 1) i d 2 50 * a continuous drain current @t c =100 ? c , v gs =10v (si licon limit) (note 1) 17 6 . 8 * continuous drain current @t c =25 ? c , v gs =10v (package limit) (note 1) 195 continuous drain current @t a =25 ? c , v gs =10v (note 2) i dsm 2 5 continuous drain current @t a =70 ? c , v gs =10v (note 2) 20 pulsed drain current @ v gs =10v i dm 1000 * avalanche current @l=100 h i as 140 single pulse avalanche energy @ l=1mh, i d = 60 amps, v dd =35v (note 4) e as 1800 mj repetitive avalanche energy (note 3) e ar 25 power dissipation t c =25 ? c (note 1) p d 2 5 0 w t c =100 ? c (note 1) 125 t a =25 ? c (note 2) p dsm 2.1 t a =70 ? c (note 2) 1.4 maximum temperature for soldering @ lead at 0.063 in(1.6mm) from case f or 10 seconds t l 300 ? c maximum temperature for soldering @ package body for 10 seconds t pkg 260 operating junction and storage temperature tj, tstg - 55~+1 75 *drain current limited by maximum junction temperature thermal data parameter symbol value unit thermal resistance, junction - to - case, max r jc 0.6 ? c /w thermal resistance, junction - to - ambient, max (note 2) r ja 58 note : 1 . the power dissipation p d is based on t j(max) =175 c, using junction - to - case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. 2 . the value of r ja is measured with the device mounted on 1 in 2 fr - 4 board with 2 oz. copper, in a still air environment with t a =25 c. the power dissipation p dsm is based on r ja and the ma ximum allowed junction temperature of 150 c. the value in any given application depends on the user s specific board design, and the maximum temperature of 175 c may be used if the pcb allows it. 3 . repetitive rating, pulse wi dth limited by junction temperature t j(max) =175 c. ratings are based on low frequency and low duty cycles to keep initial t j =25 c. 4. 100% tested by conditions of l=1mh, i as = 34 a, v gs =10v, v dd = 35 v.
cystech electronics corp. spec. no. : c 151 e3 issued date : 20 1 8 . 0 7 . 05 revised date : page no. : 3 / 8 mte1 d 3n0 4 b e3 cyste k product specification characteristics (t j =25 ? symbol min. typ. max. unit test conditions static bv dss 4 0 - - v v gs = 0v , i d = 250 a v gs(th) 2 - 4 v ds = v gs , i d = 250 a *g fs - 35.8 - s v ds = 10v , i d = 20a i gss - - 100 n a v gs = 20v , v ds =0v i dss - - 1 a v ds = 32 v, v gs =0v - - 25 v ds = 32 v, v gs =0v, tj=125 ? c *r ds ( on ) - 1 . 4 1 .8 m v gs = 10v , i d = 5 0a dynamic *qg - 174.1 - nc v dd = 2 0v, i d = 50 a,v gs =10v *qgs - 39.2 - *qgd - 54 - *t d(on) - 40.2 - ns v dd = 2 0v, i d = 50 a, v gs =10v, r g = 1 *tr - 2 5.2 - *t d(off) - 118.2 - *t f - 4 0 - ciss - 8756 - pf v gs =0v, v ds = 2 0v, f=1mhz co ss - 1108 - crss - 666 - rg - 2.5 - f=1mhz source - drain diode *i s - - 208 a *i sm - - 758 *v sd - 0. 79 1.2 v i s = 3 0a, v gs =0v *trr - 3 3.2 - ns v gs =0v, i f = 30 a, di f /dt=100a/ s *qrr - 29.6 - nc *pulse test : pulse width ? 3 0 0s, duty cycle ? 2%
cystech electronics corp. spec. no. : c 151 e3 issued date : 20 1 8 . 0 7 . 05 revised date : page no. : 4 / 8 mte1 d 3n0 4 b e3 cyste k product specification typical characteristics typical output characteristics 0 30 60 90 120 150 180 210 240 270 300 0 1 2 3 4 5 v ds , drain-source voltage(v) i d , drain current(a) 10v,9v,8v,7v,6v 4.5v v gs =4v 5v 5.5v brekdown voltage vs junction temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 200 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 1 10 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs = 6v 7v 10v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 0 2 4 6 8 10 12 14 16 18 20 i dr , reverse drain current(a) v sd , source-drain voltage(v) tj=25c tj=150c static drain-source on-state resistance vs gate-source voltage 0 1 2 3 4 5 6 7 8 9 10 0 2 4 6 8 10 v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =50a drain-source on-state resistance vs junction tempearture 0 0.4 0.8 1.2 1.6 2 2.4 2.8 -75 -50 -25 0 25 50 75 100 125 150 175 200 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =10v, i d =50a r ds(on) @tj=25c : 1.4m typ.
cystech electronics corp. spec. no. : c 151 e3 issued date : 20 1 8 . 0 7 . 05 revised date : page no. : 5 / 8 mte1 d 3n0 4 b e3 cyste k product specification t ypical characteristics (cont.) capacitance vs drain-to-source voltage 100 1000 10000 100000 0 5 10 15 20 25 30 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.2 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 200 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a i d =1ma forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 i d , drain current(a) g fs , forward transfer admittance(s) pulsed ta=25c v ds =15v v ds =10v gate charge characteristics 0 2 4 6 8 10 0 20 40 60 80 100 120 140 160 180 200 total gate charge---qg(nc) v gs , gate-source voltage(v) i d =50a v ds =20v v ds =30v maximum safe operating area 0.1 1 10 100 1000 10000 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current(a) dc 100ms 10ms 100 s 10 s r ds(on) limited t c =25c, tj=175c, v gs =10v,r jc =0.6c/w single pulse 1ms maximum drain current vs case temperature 0 50 100 150 200 250 300 25 50 75 100 125 150 175 200 t c , case temperature(c) i d , maxim um drain current(a) v gs =10v, r jc =0.6c/w silicon limit package limit
cystech electronics corp. spec. no. : c 151 e3 issued date : 20 1 8 . 0 7 . 05 revised date : page no. : 6 / 8 mte1 d 3n0 4 b e3 cyste k product specification typical characteristics (cont.) typical transfer characteristics 0 30 60 90 120 150 180 210 240 270 300 0 1 2 3 4 5 6 7 8 9 10 v gs , gate-source voltage(v) i d , drain current (a) v ds =10v single pulse maximum power dissipation 0 500 1000 1500 2000 2500 3000 3500 4000 4500 5000 0.0001 0.001 0.01 0.1 1 10 pulse width(s) peak transient power (w) t j(max) =175c t c =25c r jc =0.6c/w transient thermal response curves 0.01 0.1 1 1.e-05 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r jc (t)=r(t)*r jc 2.duty factor, d=t 1 /t 2 3.t jm -t c =p dm *r jc (t) 4.r jc =0.6 c/w
cystech electronics corp. spec. no. : c 151 e3 issued date : 20 1 8 . 0 7 . 05 revised date : page no. : 7 / 8 mte1 d 3n0 4 b e3 cyste k product specification recommended wave soldering condition product peak temperature soldering time pb - free devices 260 +0/ - 5 ? c 5 +1/ - 1 seconds recommended temperature profile for ir reflow profile feature sn - pb eutectic assembly pb - free assembly average ramp - up rate (tsmax to tp) 3 ? c /second max. 3 ? c /second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 ? c 150 ? c 60 - 120 seconds 150 ? c 2 00 ? c 60 - 180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 ? c 60 - 150 seconds 217 ? c 60 - 150 seconds peak temperature(t p ) 240 +0/ - 5 ? c 260 +0/ - 5 ? c time within 5 ? c of actual peak temperature(tp) 10 - 30 seconds 20 - 40 seconds ramp down rate 6 ? c /second max. 6 ? c /second max. time 25 ? c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c 151 e3 issued date : 20 1 8 . 0 7 . 05 revised date : page no. : 8 / 8 mte1 d 3n0 4 b e3 cyste k product specification to - 220 dimension *: typical dim mill imeters inches dim millimeters inches min. max. min. max. min. max. min. max. a 4.400 4.600 0.173 0.181 e 2.540* 0.100* a1 2.250 2.550 0.089 0.100 e1 4.980 5.180 0.196 0.204 b 0.710 0.910 0.028 0.036 f 2.650 2.950 0.104 0.116 b1 1.170 1.370 0.046 0. 054 h 7.900 8.100 0.311 0.319 c 0.330 0.650 0.013 0.026 h 0.000 0.300 0.000 0.012 c1 1.200 1.400 0.047 0.055 l 12.900 13.400 0.508 0.528 d 9.910 10.250 0.390 0.404 l1 2.850 3.250 0.112 0.128 e 8.950 9.750 0.352 0.384 v 7.500 ref 0.295 ref e 1 12.65 0 12.950 0.498 0.510 3. 6 00 3.800 0.14 2 0.150 notes: 1. controlling dimension: millimeters. 2 . maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please contact your local cystek sales office. material: ? ? mold compound: epoxy resin family, flammability solid burning class: ul94v - 0 . important notice: ? ? ? semiconductor products are not warranted to be suitable for use in life - support applications, or systems. ? marking: 4 style: pin 1. gate 2. drain 3. source 4. drain 3 - lead to - 220 plastic package cystek package code: e3 device name date code 1 2 3 e1 d 3 n0 4 b
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